Activities at the University of Ottawa
Activities at the University of OttawaThe work described below is being funded by several sources: Bell-Northern Research, Bellcore, Communications Canada, the National Science and Engineering Research Council of Canada, NIST (USA Dept of Commerce), and Telecommunications Research Institute of Ontario.
The address for requesting the technical reports listed below is as follows; please provide TR numbers. Some are also in the anonymous ftp server lotos.csi.uottawa.ca.

Our work on tool development has continued to progress. Our interpreter is
now called ELUDO (Environnement
de l'Université d'Ottawa), a name
invented by Hans van der Schoot (a Twente student now doing his PhD in
Ottawa). ELUDO now enjoys two interfaces: a curses interface for
people wanting to use it remotely, and an X interface. Both interfaces are
stable now, thanks to the work of Jacques Sincennes (jack@csi.uottawa.ca),
valiantly helped by a stagiaire of the Ecole Nationale Supérieure des
Télécommunications, Jean Tourrilhes. Some interesting features of our
interpreter are the possibility of re-executing previously executed paths
with different values, the value expression editor (which enables one to
construct correct value expressions by using menu and mouse), construction
of symbolic reachability trees, and goal-oriented execution. A `guided
tour' of our interpreter will appear soon in our ftp server, or you can get
information by mailing Jacques.
The project EUCALYPTUS (European/Canadian
toolset) is a joint effort
of several universities. The tools involved are those developed:
The main idea is to use ELUDO and TETRA to `explain' diagnostic sequences found by the CAESAR/ALDEBARAN tool.
Our work on the use of
in the specification of hardware has been the
object of some interest. Multi-way synchronization appears to be a good way
of representing the type of value-creation that occurs on a wire. Will it
turn out to be the unifying concept between hardware and software? Our
paper on the use of
in the specification of circuits appears in
[1] and is available in the ftp server as chld.93. We are in the process of completing an extended version of the
same paper. Trouble is, hardware designers are navigating mostly in areas
that are quite far from process algebras. For this reason, we have put this
project (temporarily) on the back burner.
Kazi Farooqui (farooqui@csi.uottawa.ca) is active in Open Distributed Processing architecture. Some of our work in this topic can be found in [3], also published as TR-93-18. This article as well should make its appearance soon in the ftp server.
Our strongest area continues to be the use of
in telephony.
Recently, we have produced three technical reports on the subject.
In the first paper (which actually was written a couple of years ago), we describe a sort of `resource-oriented' way of describing telephone systems: this is [7], also published as TR-93-07. Bernard Stépien's email address is bernard@csi.uottawa.ca.
In a paper with Mohamed Faci (mfaci@csi.uottawa.ca) we have proposed a methodology for detecting feature interaction based on the idea that potential feature interactions show up as logical contradictions at the design stage. This is [2], also published as TR-93-21.
A different methodology towards the same goal has been proposed in a paper
with Bernard Stépien (bernard@csi.uottawa.ca). The idea here is that
feature interactions often show up as nondeterminism in the execution of a
specification. Interestingly, this nondeterminism can be detected by the
technique of `backward execution', which, in the area of distributed system
validation, has attracted sporadic attention in the past. Backward
execution can be applied (within limits, of course!) to
. Please see
[8], also published as TR-94-03.
Francis Bordeleau (francis@sce.carleton.ca), a student of Prof. Ray Buhr at
Carleton University (buhr@sce.carleton.ca) has completed a Master's thesis
and some technical reports where he develops an architectural representation
called LARG (
Architectural Representation Graphs). This
representation is inspired by Buhr's Machine Charts. The idea of this work
is to make
methodology useful in a graphical design environment.
LARG is somewhat related to G-
.
Ray Buhr has also developed a design-oriented visual notation called
`Timethreads', which has achieved some amount of use in industry. The aim
of this notation is to describe causality-flow scenarios. Daniel Amyot
(damyot@csi.uottawa.ca) has shown that timethread notation can be translated
into
. This is in a research report `From Timethreads to
: A
First Pass'.
Bordeleau and Amyot are working to develop these ideas further. Their goal
is to develop a
-supported methodology for system design, based on
Machine Charts and Timethreads. Their work is published in TRs of Carleton
University and is available from them. Some of it is also available in
ftp.sce.carleton.ca.